Research (TIRIS)
As junior TIRIS-fellow and post-doctoral researcher at LAAS-CNRS, I am working on advanced nano-electronic devices. My project "NAVIGATE2AI" aims to create more environmentally friendly A.I. systems, reducing their over-all energy consumption and total carbon-footprint, in response to the increasing demand of large neural networks for artificial intelligence (A.I.) computation. My focus is thus on the development of the required key technologies such as vertical gate-all-around (GAA) transistors and ferroelectric memories (FeRAM) in logic devices to create highly energy efficient A.I. systems.
Latest publications
2024 Journal articles
Damiano Ricciarelli, Jonas Müller, Guilhem Larrieu, Ioannis Deretzis, Gaetano Calogero, Enrico Martello, et al. Laser-Annealed SiO2/Si1−xGex Scaffolds for Nanoscaled Devices, Synergy of Experiment, and Computation. Physica status solidi (a), accepted
Y. Wang, Mukherjee Chhandak, H. Rezgui, M. Deng, Jonas Müller, et al.. Evidence of trapping and electrothermal effects in vertical junctionless nanowire transistors. Solid-State Electronics, 2024, 211, pp.108805. ⟨10.1016/j.sse.2023.108805⟩. ⟨hal-04297709⟩
Abhishek Kumar, Jonas Müller, Sylvain Pelloquin, Aurélie Lecestre, Guilhem Larrieu. Logic Gates Based on 3D Vertical Junctionless Gate-All-Around Transistors with Reliable Multilevel Contact Engineering. Nano Letters, 2024, 24 (26), pp.7825-7832. ⟨10.1021/acs.nanolett.3c04180⟩. ⟨hal-03600982⟩
Chiara Rossi, Jonas Müller, Peter Pichler, Paweł Piotr Michałowski, Guilhem Larrieu. TCAD modeling and simulation of self-limiting oxide growth and boron segregation during vertical silicon nanowire processing. Materials Science in Semiconductor Processing, 2024, 174, pp.108217. ⟨10.1016/j.mssp.2024.108217⟩. ⟨hal-04639888⟩
Nicolas Mallet, Jonas Müller, Julien Pezard, Fuccio Cristiano, Raghda Makarem, et al.. Metallic Nanoalloys on Vertical GaAs Nanowires: Growth Mechanisms and Shape Control of Ni-GaAs Compounds. ACS Applied Materials & Interfaces, 2024, 16 (2), pp.2449-2456. ⟨10.1021/acsami.3c09689⟩. ⟨hal-04639884⟩
2024 Conference papers
Ian O'Connor; Sara Mannaa; Alberto Bosio; Bastien Deveautour; Damien Deleruyelle; Tetiana Obukhova, et al.. FVLLMONTI: The 3D Neural Network Compute Cube (N2C2) Concept for Efficient Transformer Architectures Towards Speech-to-Speech Translation. 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), Jun 2024, Valencia, Spain. ⟨10.23919/DATE58400.2024.10546700⟩
2023 Journal articles
M. Chhandak, H. Rezgui, Y. Wang, M. Deng, A. Kumar, et al.. Nanoscale Thermal Transport in Vertical Gate-All-Around Junctionless Nanowire Transistors—Part I: Experimental Methods. IEEE Transactions on Electron Devices, 2023, pp.1-7. ⟨10.1109/TED.2023.3321277⟩. ⟨hal-04296517⟩
Sara Mannaa, Arnaud Poittevin, Cédric Marchand, Damien Deleruyelle, Bastien Deveautour, et al.. 3D Logic circuit design oriented electrothermal modeling of vertical junctionless nanowire FETs. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2023, 9 (2), pp.116 - 123. ⟨10.1109/JXCDC.2023.3309502⟩. ⟨hal-04230911⟩
Ana Estrada-Real, Ioannis Paradisanos, Peter Wiecha, Jean-Marie Poumirol, Aurelien Cuche, et al.. Probing the optical near-field interaction of Mie nanoresonators with atomically thin semiconductors. Communications Physics, 2023, 6 (1), pp.102. ⟨10.1038/s42005-023-01211-2⟩. ⟨hal-03845142⟩
César Jara Donoso, Antoine Jay, Julien Lam, Jonas Müller, Guilhem Larrieu, et al.. A comprehensive atomistic picture of the as-deposited Ni-Si interface before thermal silicidation process. Applied Surface Science, 2023, 631, pp.157563. ⟨10.1016/j.apsusc.2023.157563⟩. ⟨hal-04104341⟩
Paweł Piotr Michałowski, Jonas Müller, Chiara Rossi, Alexander Burenkov, Eberhard Bär, et al.. Secondary ion mass spectrometry quantification of boron distribution in an array of silicon nanowires. Measurement - Journal of the International Measurement Confederation (IMEKO), 2023, 211, pp.112630. ⟨10.1016/j.measurement.2023.112630⟩. ⟨hal-04234520⟩
Chiara Rossi, Alexander Burenkov, Peter Pichler, Eberhard Bär, Jonas Müller, et al.. Performance of vertical gate-all-around nanowire p-MOS transistors determined by boron depletion during oxidation. Solid-State Electronics, 2023, 200, pp.108551. ⟨10.1016/j.sse.2022.108551⟩. ⟨hal-04234531⟩
Martin Montagnac, Yoann Brûlé, Aurelien Cuche, Jean-Marie Poumirol, Sébastien J. Weber, et al.. Control of light emission of quantum emitters coupled to silicon nanoantenna using cylindrical vector beams. Light: Science and Applications, 2023, 12 (1), pp.239. ⟨10.1038/s41377-023-01229-9⟩. ⟨hal-04212490⟩
H. Rezgui, Mukherjee Chhandak, Y. Wang, M. Deng, A. Kumar, et al.. Nanoscale Thermal Transport in Vertical Gateall-around Junction-less Nanowire Transistors-Part II: Multiphysics Simulation. IEEE Transactions on Electron Devices, 2023, 70 (12), pp.6505 - 6511. ⟨10.1109/TED.2023.3321280⟩. ⟨hal-04296531⟩
J. Müller, A. Lecestre, R. Demoulin, F. Cristiano, J.-M. Hartmann and G. Larrieu. Engineering of dense arrays of Vertical Si1-xGex nanostructures. Nanotechnology, 2023, 34, pp.105303. ⟨10.1088/1361-6528/aca419⟩.
2023 Conference papers
Guilhem Larrieu, Houssem Rezgui, Abhishek Kumar, Jonas Müller, Sylvain Pelloquin, et al.. Thermal consideration in nanoscale gate-all-around vertical transistors. Silicon Nanoelectronics Workshop (SNW 2023), Jun 2023, Kyoto, Japan. pp.27-28, ⟨10.23919/SNW57900.2023.10183951⟩. ⟨hal-04189328⟩
Guilhem Larrieu, Jonas Müller, Sylvain Pelloquin, Abhishek Kumar, Konstantinos Moustakas, et al.. Advanced contacts on 3D nanostructured channels for vertical transport gate-all-around transistors. 21st International Workshop on Junction Technology (IWJT 2023), Jun 2023, Kyoto, Japan. pp.1-4, ⟨10.23919/IWJT59028.2023.10175172⟩. ⟨hal-04189319⟩
Yifang Wang, Houssem Rezgui, Mukherjee Chhandak, Marina Deng, Abhishek Kumar, et al.. Evidence of Trapping and Electrothermal Effects in Vertical Junctionless Nanowire Transistors. 9th Joint International EuroSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS) 2023, May 2023, Tarragona, Spain. ⟨hal-04231605⟩
Yifan Wang, Mukherjee Chhandak, Houssem Rezgui, Marina Deng, Cristell Maneux, et al.. Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design. IEEE 53rd European Solid-State Device Research Conference (ESSDERC 2023), Sep 2023, Lisbon, Portugal. pp.57-60, ⟨10.1109/ESSDERC59256.2023.10268560⟩. ⟨hal-04231616⟩
Jonas Müller, Rémi Demoulin, Fuccio Cristiano, Guilhem Larrieu. Investigation of the formation of nickel silicides on vertical silicon nanostructured channel for advanced electronics. E-MRS 2023 SPRING MEETING, May 2023, Strasbourg, France. ⟨hal-04423814⟩
2022 Conference papers
Jonas Müller, Aurélie Lecestre, Rémi Demoulin, Fuccio Cristiano, J. M. Hartmann, Guilhem Larrieu. Top-Down Fabrication of Vertical Nanostructured Channel Arrays on SiGe for Future Nanoelectronics Applications. MNE Eurosensors 2022, Sep 2022, Leuven, Belgium. ⟨hal-03771503v1⟩
Jonas Müller, Aurélie Lecestre, Rémi Demoulin, Fuccio Cristiano, J. M. Hartmann, et al. Advances in top-down fabrication and processing of vertical SiGe nanowire arrays for future nanoelectronics applications. J2N 2022 - Journées Nationales Nanofils semiconducteurs, Sep 2022, Nice, France. ⟨hal-03771519v1⟩
