Research Topics - MPN
In line with the research activities carried out since its creation, the overall ambition of the MPN team for the forthcoming years will still be to contribute to the advance of knowledge in the Nanoelectronics domain.
With the evergrowing need to achieve low-power, high-performance and massively integrated nanoelectronic devices for logic/memory (More Moore) as well as CMOS-based More-than-Moore applications, an extremely large spectrum of physical and technological challenges will be faced by researchers both at academic and industrial levels. Among these challenges, several ones, which are critically important for both advanced planar (FD-SOI) and 3D multigate (MG) devices (FinFETs, or NW-based), are of strong interest to the MPN research team.
At the materials level, they include the integration of high-mobility materials (such as III-Vs and Ge) on silicon substrates and the improvement of their physical properties (high dopant activation in n-type Ge to minimise contact resistivity, phase and defect density control in III-V materials grown on Si, defect minimisation at interfaces betwenn III-V/Ge and Si).
At the process level, they include the improvement of strain engineering solutions and the controlled device scaling in all aspects, including S/D series resistance, mobility enhancement, new channel materials and contact silicidation.
Finally, at the device level, the main issue concerns the fabrication of advanced non-planar multi-gate and nanowire MOSFETs down to less than 10 nm gate length, with perfect control of short-channel effects and power scaling (while supplying sufficient current drive).
Within this context the MPN “mission” will be accomplished through two specific objectives: (i) the understanding and modeling of the physical phenomena occurring during the investigated fabrication processes; (ii) the fabrication of innovative nanoelectronic devices. They will be achieved following our established strategy path, ranging from materials science studies, through process optimisation and finally to the demonstration of functional devices. This will be supported by the specific skills of our research staff in the field of structural and electrical characterisation, nanofabrication and device characterisation.
The activity on Ultra-Shallow source/drain Junctions will continue in line with the requirements of the most advanced MOS devices, where S/D series and contact resistance or dopant conformality are today more relevant figures of merits than junction depth.
Finally, NW-based nanosystems will be further developed towards III-V based materials thanks to the recent arrival of a new permanent researcher with recognised expertise in the growth of III-V NWs. The future activities of the MPN team can therefore be described as follows: