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Abstract

As for railway traction applications, aeronautical power electronics implies high power density handling. Moreover typical aeronautical applications impose a harsh thermal environment. SiC technology has recently emerged for high power and high temperature application, but is not yet mature enough. Consequently it is still important to push the silicon devices temperature limits in order to increase the amount of switched power. Device ageing is accelerated and there exists the risk of catastrophic failure by thermal runaway. In order to design correctly high temperature power systems, knowing the IGBT characteristics at extended temperature ranges becomes essential. This paper describes an experimental setup and test procedure conceived to experiment with different available IGBT technologies at temperatures beyond the limits rated by manufacturers (-55 °C, +175 °C). The aim is to characterize the devices for a better understanding and optimized safe application. This will ease prototyping for future development of IGBT modules in aircraft.

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Abstract

As power component manufacturers may not wish to publish confidential information about their technology, automotive system engineers are lacking in technical information for thermal design optimization. The device structure and material data information is particularly significant for electrothermal coupling, to generate correct and reliable Compact Thermal Model (CTM). Several innovations in methodologies for power components manufacturers are proposed in this paper, in order to accurately generate CTM.

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Abstract

Several innovations in methodologies for power components manufacturers to generate accurate dynamic Compact Thermal Models (CTMs) are proposed in this paper. This makes possible providing customers (automotive systems suppliers) with extended datasheets, including CTMs, without publishing any confidential information about technology, device structures nor materials. Ideal CTM should be accurate, simple, able to manage multiple heat sources and cooling surfaces, able to take non-linear physical properties of materials into account and boundary condition independent. Nevertheless it has to remain easy to extract. Existing methodologies usually focus on some of these qualities; otherwise the resulting CTM would become too complex. The proposed paper explores some innovative solutions in order to improve them. Firstly, it is presented an evolution of the star thermal network, to extract boundary condition independent CTMs of systems with multiple cooling surfaces. Secondly, an innovative and accurate dynamic CTM extraction method is proposed for multi-chip power electronics systems, a new method specially conceived for multiple coupled heat sources. The method is based on a definition of the Optimal Thermal Coupling Point, which is proven to be valid even for transient modeling. Compared to the existing methods, the number of needed 3D thermal simulations or measurements is significantly reduced.

Abstract

A Compact Thermal Model extraction method for multi-chip power electronics systems is proposed. Innovative and accurate, it accounts for dynamic thermal coupling between multiple heat sources. The use of this model permits system designers to easily take into account transient electro-thermal coupling. The method is based on a definition of the Optimal Thermal Coupling Point, which is proven to be suitable even under transient conditions. Compared to the existing methods, the number of needed 3D thermal simulations or measurements for the model deduction is significantly reduced.

Abstract

A 3-D electrical finite-element model (FEM) for the design of an ultra-low on-state resistance power MOSFET device is presented. Model building and layer conductivity are discussed to take into account microscopic, technological, and electrical effects, such as metal step coverage and MOS behavior of each elementary cell of the transistor. Model simplifications are also presented to ensure time-efficient simulations. FEM gauging is then achieved, by comparing simulation results to electrical measurements, on devices subjected to top metallization debiasing effects. Simulations show a good agreement with measurements for result errors at less than 2%. The aim of this paper is to provide an accurate estimation of the contribution of parasitic elements such as the shape and number of power bonding wires or top metallization thickness to power device on-state resistance (RON). The 3-D electrical FEM is a mandatory first step towards an accurate electrothermal FEM for the design of efficient power products.

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A method based on the failure analysis of power MOSFET devices tested under extreme electrothermal fatigue is proposed. Failure modes are associated to several structural changes that have been investigated through acoustic, electron and ion microscopy. The main aging mode is related to the exponential increase in drain resistance due to delamination at the die attach. Earlier failures are observed when very local defects due to electrical over stresses (EOS) occur at the source metallization or at the wire bonding. Aging models were elaborated to account for the die attach delamination, but are still lacking to take in account the structural evolution of the Al metallization. This new methodology, based on accelerated tests and structural observations aims at designing a new generation of power components that will be more reliable.

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