149documents trouvés
Edouard estaunié, Electrical Engineer, Novelist and Teacher, the man who coined the term Telecommunications
J.M.DILHAC
ISGE
Manifestation sans acte : IEE & SEE History of Telecommunications Conference (HISTELCON 2008), Paris (France), 11-12 Septembre 2008, pp.28-31 , N° 08880
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120379Un aperçu des réseaux de capteurs sans fil au Japon : de la gestion de l'énergie à l'architecture des réseaux
M.BAFLEUR, J.M.DILHAC, L.CLAVIER
ISGE, IEMN
Rapport LAAS N°08888, Rapport de mission n° SMM08_042 pour l'Ambassade de France au Japon (2008), 1er Août 2008
Lien : http://www.bulletins-electroniques.com/rapports/smm08_042.htm
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120261Multi look-up table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects
P.L.GILABERT, A.CESARI, G.MONTORO, E.BERTRAN, J.M.DILHAC
UPC, ISGE
Revue Scientifique : IEEE Transactions on Microwave Theory and Techniques, Vol.56, N°2, pp.372-384, Février 2008 , N° 08360
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Abstract
This paper presents a hardware implementation of a digital predistorter (DPD) for linearizing RF power amplifiers (PAs) for wideband applications. The proposed predistortion linearizer is based on a nonlinear auto-regressive moving average (NARMA) structure, which can be derived from the NARMA PA behavioral model and then mapped into a set of scalable lookup tables (LUTs). The linearizer takes advantage of its recursive nature to relax the LUT count needed to compensate memory effects in PAs. Experimental support is provided by the implementation of the proposed NARMA DPD in a field-programmable gate-array device to linearize a 170-W peak power PA, validating the recursive DPD NARMA structure for W-CDMA signals and flexible transmission bandwidth scenarios. To the best of the authors' knowledge, it is the first time that a recursive structure is experimentally validated for DPD purposes. In addition to the results on PA efficiency and linearity, this paper addresses many practical implementation issues related to the use of FPGA in DPD applications, giving an original insight on actual prototyping scenarios. Finally, this study discusses the possibility of further enhancing the overall efficiency by degrading the PA operation mode, provided that DPD may be unavoidable due to the impact of memory effects.
Mots-Clés / Keywords
Field programmable gate array; Nonlinear auto-regressive moving average models; Power amplifier linearization; Digital predistortion;
Evaluation du potentiel énergétique des vibrations moteur transformées par transduction piézo-électrique et capacitive pour l'alimentation d'un capteur autonome de mesure de structures aéronautiques
D.GUIHAL, C.ROSSI, D.ESTEVE, H.DUROU, J.M.DILHAC, M.BRUNET, A.RAMOND, G.A.ARDILA RODRIGUEZ, D.PECH
N2IS, ISGE
Rapport de Contrat : Contrat AUTOSENS. Version 1.1, Janvier 2008, 58p. , N° 08008
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112694A FPGA based digital predistorter for RF power amplifiers with memory effects
A.CESARI, P.L.GILABERT, E.BERTRAN, G.MONTORO, J.M.DILHAC
ISGE, UPC
Manifestation avec acte : 37th European Microwave Conference, Munich (Allemagne), 8-12 Octobre 2007, 4p. , N° 07124
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Abstract
This paper presents a Field Programmable Gate Array (FPGA) based platform for prototyping digital predistortion (DPD) linearizers, and a scalable DPD architecture is proposed and implemented. This architecture eases the process of meeting transmission linearity requirements, depending of the degree of impairments added by the transmitter chain, and enables a quick migration between different DPD schemes. Details on the internal DPD organization, reconfiguration abilities, as well as experimental results showing DPD linearization of a 10W LDMOS RF power amplifier are provided, giving an insight on actual development scenarios of DPD systems accounting for memory effects.
M-ary modulation signalling for intercellular communication: an electrical engineering point of view
J.M.DILHAC
ISGE
Manifestation avec acte : 7th International Workshop on Information Processing in Cells and Tissues (IPCAT 2007), Oxford (Angleterre), 29-31 Août 2007, pp.11-18 , N° 07377
Lien : http://hal.archives-ouvertes.fr/hal-00419205/fr/
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Mots-Clés / Keywords
Intercellular communication; Information; Modulation; Network;
A DC-DC converter FPGA driver for efficiency enhancement of wideband RF power amplifiers
A.CESARI, J.M.DILHAC, C.ALONSO, A.CID-PASTOR
ISGE, Rovira
Manifestation avec acte : ISIE 2007. IEEE International Symposium on Industrial Electronics, Vigo (Espagne), 4-7 Juin 2007, pp.1639-1644 , N° 06821
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Abstract
A digital driver enabling the use of highly efficient, switched DC-DC converters for dynamic supply of Radio Frequency (RF) Power Amplifiers (PA) is proposed in this paper. Its design procedure, targeting a FPGA implementation, is fully detailed. Using simulation procedures, the potential of the proposed driver to enhance both PA linearity and efficiency figures in wideband RF applications is highlighted, as well as its robustness in front of temporal misalignments between the RF and the supply paths.
LEGO process for mixed power applications: fabrication at low cost of localized thick SOI layers
I.BERTRAND, J.M.DILHAC, P.RENAUD, M.BAFLEUR, C.GANIBAL
ISGE, FREESCALE, 2I
Manifestation avec acte : 211th Meeting of the Electrochemical Society (ESC 2007), Chicago (USA), 6-11 Mai 2007, pp.327-332 , N° 07030
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110122A FPGA-based platform for fast prototyping of RF PA predistorsion linearizers
A.CESARI, J.M.DILHAC, P.L.GILABERT, G.MONTORO, E.BERTRAN
ISGE, UPC
Manifestation avec acte : 7th IEEE Topical Symposium on Power Amplifiers for Wireless Communications , Long Beach (USA), 8-9 Janvier 2007, 2p. , N° 06745
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109281A DSP structure authorizing reduced-bandwidth DC/DC converters for dynamic supply of RF power amplifiers in wideband applications
A.CESARI, A.CID-PASTOR, C.ALONSO, J.M.DILHAC
ISGE
Manifestation avec acte : 32nd Annual Conference of the IEEE Industrial Electronics Society (IECON'2006), Paris (France), 6-10 Novembre 2006, pp.3362-3366 , N° 06542
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