Laboratoire d’Analyse et d’Architecture des Systèmes
R.MONTHEARD, V.BOITIER, M.BAFLEUR, X.LAFONTAN, J.M.DILHAC
ISGE, INTESENS
Rapport LAAS N°12102, Mars 2012, 2p.
Non diffusable
126743R.MONTHEARD, M.BAFLEUR, V.BOITIER, J.M.DILHAC, X.LAFONTAN
ISGE, NOVAMEMS
Rapport LAAS N°12036, Février 2012, 19p.
Non diffusable
126461M.DIATTA, D.TREMOUILLES, E.BOUYSSOU, R.PERDREAU, C.ANCEAU, M.BAFLEUR
ISGE, ST
Revue Scientifique : IEEE Transactions on Electron Devices, Vol.59, N°1, pp.108-113, Janvier 2012 , N° 12048
Lien : http://hal.archives-ouvertes.fr/hal-00668818
Diffusable
Plus d'informations
In electronic systems, the ever-increasing level of integration is paced by component scaling. Consequently, system-level protection improvements in electrostatic discharge (ESD) reliability during a device's lifetime are mandatory. To this end, we have investigated bidirectional system-level ESD protection diodes that have been subjected to repetitive human metal model stresses. Our goal was to develop robust ESD components by understanding the physical and electrical behaviors of components after multiple ESD surges. In this paper, three ESD-induced failure modes of protection devices are demonstrated and analyzed in terms of severity, i.e., charge trapping in the silicon-oxide interface, metallic diffusion toward the contacts, and melted filaments in the silicon bulk at the junction periphery.
H.ARBESS, M.BAFLEUR
ISGE
Revue Scientifique : Microelectronics Reliability, Vol.51, N°9-11, pp.1980-1984, Octobre 2011 , N° 11282
Diffusable
125577M.BAFLEUR
ISGE
Conférence invitée : Journée thématique Fiabilité des Composants et Systèmes, Rouen (France), 20 Octobre 2011, 24p. , N° 11775
Diffusable
126479M.ZERARKA, P.AUSTIN, M.BAFLEUR
ISGE
Manifestation avec acte : International Semiconductor Conference (CAS 2011), Sinaia (Roumanie), 17-19 Octobre 2011, 4p. , N° 11541
Diffusable
125531M.BAFLEUR, H.AUBERT, H.BLONDEAUX, G.CLUZET, L.DESPOISSE, J.M.DILHAC, S.HEBIB, P.PONS, A.TAKACS
ISGE, MINC, Thalès Alenia Space, Thalès Alenia Space
Rapport de Contrat : Etude CNES R&T n° 115052, Octobre 2011, 47p. , N° 11753
Non diffusable
126419H.ARBESS, M.BAFLEUR
ISGE
Manifestation avec acte : European Symposium Reliability of Electron Devices Failure Physics and Analysis (ESREF 2011), Bordeaux (France), 3-7 Octobre 2011, 4p. , N° 11282
Diffusable
125576N.MONNEREAU, F.CAIGNET, N.NOLHIER, D.TREMOUILLES, M.BAFLEUR
ISGE
Manifestation avec acte : EMC Europe 2011, York (UK), 26-30 Septembre 2011, pp.457-463 , N° 11069
Lien : http://hal.archives-ouvertes.fr/hal-00722643
Diffusable
Plus d'informations
In this paper, a behavioral modeling methodology to predict ElectroStatic-Discharge (ESD) failures at system level is proposed and validated. The proposed models enable time domain simulation to determine voltage and current waveforms inside and outside an IC during ESD events in order to predict the susceptibility of an electronic system to ESD. Very-high-speed integrated circuit Hardware Description Language - Analog and Mixed Signals (VHDL-AMS) is used as the description language. The purpose of this methodology is based on the improvement of Input Output Buffer Information Specification (IBIS) models widely used in signal integrity (SI) simulation. In this paper the additional information required to be added to IBIS files is described, and comparison between simulations and measurements are exposed.
L.DESPOISSE, H.AUBERT, M.BAFLEUR, H.BLONDEAUX, G.CLUZET, J.M.DILHAC, S.HEBIB, C.VANHECKE
Thalès Alenia Space, MINC, ISGE, Thalès Alenia Space
Rapport de Contrat : Etude CNES R&T n° 115052, Septembre 2011, 51p. , N° 11480
Non diffusable
125289