234documents trouvés
Building-up of system level ESD modeling: Impact of a decoupling capacitance on ESD Propagation
N.MONNEREAU, F.CAIGNET, D.TREMOUILLES, N.NOLHIER, M.BAFLEUR
ISGE, ESE
Papier invité dans une revue : Microelectronics Reliability, 8p., Décembre 2012, http://dx.doi.org/10.1016/j.microrel.2012.04.012 , N° 10099
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128684Self-adaptive ultra-capacitors: a new concept for efficient energy harvesting and storage
R.MONTHEARD, M.BAFLEUR, V.BOITIER, J.M.DILHAC, X.LAFONTAN
INTESENS, ESE
Manifestation avec acte : International Workshop on Micro and Nanotechnology for Power Generation and Energy Conversion Applications ( PowerMEMS ) 2012 du 02 décembre au 05 décembre 2012, Atlanta (USA), Décembre 2012, 4p. , N° 12609
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128953Proof of concept of energy harvesting from aero acoustic noise
R.MONTHEARD, S.CARBONNE, M.BAFLEUR, V.BOITIER, J.M.DILHAC, X.DOLLAT, N.NOLHIER, E.PIOT, C.AIRIAU
ESE, Airbus SAS, 2I, I2C, ONERA, IMFT
Manifestation avec acte : International Workshop on Micro and Nanotechnology for Power Generation and Energy Conversion Applications ( PowerMEMS ) 2012 du 02 décembre au 05 décembre 2012, Atlanta (USA), Décembre 2012, 4p. , N° 12610
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128952Investingating the probability of susceptibility failure within ESD system level consideration
N.MONNEREAU, F.CAIGNET, N.NOLHIER, D.TREMOUILLES, M.BAFLEUR
ISGE
Revue Scientifique : IEEE Transactions on Device and Materials Reliability, Vol.12, N°4, pp.599-606, Décembre 2012, DOI 10.1109/TDMR.2012.2218605 , N° 11058
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Abstract
Due to growing number of embedded electronics, estimating failure related to system-level electrostatic discharge (ESD) consideration has become a major concern. In this paper, a behavioral modeling methodology to predict ESD failures at system level is proposed and validated. The proposed models enable time-domain simulation to determine the voltage and current waveforms inside and outside an integrated circuit during ESD events and then to predict the susceptibility of an electronic system to ESD. The purpose of this methodology is based on the improvement of Input/output Buffer Information Specification files widely used in signal integrity simulation. A simple case study is proposed to investigate the susceptibility of latch devices to transient stresses. Simulations and measurements are compared. Analytical formulations to determine the probability of susceptibility failure are proposed and compared with measurements.
Dispositifs analogiques
Y.AVENAS, M.BAFLEUR, S.BOLLAERT, P.CAROFF, E.DUBOIS, C.GAQUIERE, H.HAPPY, F.MORANCHO, D.PLANSON, J.B.QUOIRIN, M.ZAKNOUNE
G2Elab, ESE, IEMN, ISGE, AMPERE, Lyon, ST
Ouvrage (contribution) : Rapport sur "la micro et nano-électronique: Statut et Prospective", Groupe de travail "Microélectronique" INSIS/CNRS, 109p., Novembre 2012, 9p. , N° 12645
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128610Energy thermo generation in aeronautics for battery-free wireless sensor networks
J.M.DILHAC, M.BAFLEUR
ESE
Conférence invitée : Conference on Thermoelectrics 2012 du 21 novembre au 23 novembre 2012, Berlin (Allemagne), Novembre 2012, pp.135-143 , N° 12611
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128883Energy generation in aeronautics for battery-free wireless sensor networks
J.M.DILHAC, M.BAFLEUR
ESE
Manifestation avec acte : More Electric Aircraft ( MEA ) 2012 du 20 novembre au 21 novembre 2012, Bordeaux (France), Novembre 2012, paper n) 5-3, 5p. , N° 12612
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128938Energy harvesting for powering wireless sensor networks on-board geostationary broadcasting satellites
A.TAKACS, H.AUBERT, M.BAFLEUR, J.M.DILHAC, F.COURTADE, S.FREDON, L.DESPOISSE, C.VANHECKE, G.CLUZET
MINC, ESE, CNES, Thalès Alenia Space, Thalès Alenia Space
Manifestation avec acte : Workshop on energy and Wireless Sensors ( e-WiSe ) 2012 du 20 novembre au 23 novembre 2012, Besançon (France), Novembre 2012, 4p. , N° 12613
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128939Architecture auto-adaptative pour l'optimisation du stockage d'énergie sur supercondensateurs
R.MONTHEARD, V.BOITIER, M.BAFLEUR, X.LAFONTAN, J.M.DILHAC
ISGE, INTESENS
Manifestation avec acte : Conférence Electronique de Puissance du Futur (EPF 2012), Bordeaux (France), 5-7 Juillet 2012, 6p. , N° 12101
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127673Behavioral ESD protection modeling to perform system level ESD efficient design
F.CAIGNET, N.MONNEREAU, N.NOLHIER, M.BAFLEUR
ISGE, ESE
Conférence invitée : Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC 2012), Singapour (Singapour), 21-24 Mai 2012, pp.401-404 , N° 12442
Lien : http://hal.archives-ouvertes.fr/hal-00722644
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Abstract
For both Equipment Manufacturers (EM) and semiconductor suppliers, the prediction of ElectroStatic Discharge (ESD) events into design phase is becoming a challenging issue to insure rehability into system level considerations. This is mainly due to the shrinking of Integrated Circuits (IC) technology, which decreases the robustness level and increase the probability of failures. In this paper, we will present how to build IC's models taking into account behavioral description of ESD protections, to perform system level ESD simulations. The IBIS (Input/output Buffer Information Specification) models are mixed with information extracted from Transmission Line Pulsing (TLP) measurement's techniques to build system simulations. The methodology is detailed and proved in some case studies addressing the current propagation path and the susceptibility of the ICs. The main goal of the proposed model is that it could be shared by IC suppliers and EMs to ensure that ICs can handle system level ESD events.