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346documents trouvés

18355
01/02/2018

Wideband critically-coupled resonators

S.CALVEZ, C.ARLOTTI, A.MONMAYRANT, O.GAUTHIER-LAFAYE, N.GUTIERREZ PANOZZO, A.FERNANDEZ , O.LLOPIS

PHOTO, MOST

Manifestation avec acte : Conference on Laser Resonators and Beam Control 2018 du 27 janvier au 01 février 2018, San Francisco (USA), Février 2018, 7p. , N° 18355

Lien : https://hal.laas.fr/hal-01917874

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Abstract

Over the last two decades, integrated whispering-gallery-mode resonators have been increasingly used as the basic building blocks for selective filters, high-sensitivity sensors, and as nonlinear converters. In the latter two cases, optimum performance is achieved when the intra-cavity power or the resonance feature contrast are maximum. For devices with transversely singlemode resonator and access waveguides, the above-mentioned conditions are obtained when the system is critically coupled i.e. when the coupler power transfer rate corresponds to the single-pass intra-cavity loss. Designing coupled resonators for which critical-coupling is maintained over a large spectral range is therefore attractive to facilitate sensing or nonlinear frequency conversion. In this paper, we theoretically show, using a generic model based on the universal description of the device spectral characteristics and a coupled-mode theory treatment of the coupling section, that access-waveguide-coupled resonators can exhibit a wideband critical-coupling bandwidth when their constitutive resonator and access waveguides are different i.e. when they are phase-mismatched. To illustrate this, we have calculated the spectral response of Si3N4/SiO2 racetrack resonators and have found that, when the coupler beat-length becomes achromatic, the device critical-coupling bandwidth is expanded by more one order of magnitude compared to their phase-matched counterpart.

145104
18534
02/01/2018

Experimental investigations for designing low phase noise 10 GHz coupled optoelectronic oscillator

O.LELIEVRE, V.CROZATIER, G.BAILI, P.NOUCHI, D.DOLFI, L.MORVAN, F.GOLDFARB, F.BRETENAKER, O.LLOPIS

Thales R&T, LAC, MOST

Manifestation avec acte : SPIE Photonics West 2018 du 27 janvier au 02 février 2018, San Francisco (USA), Janvier 2018 , N° 18534

Lien : https://hal.laas.fr/hal-01990785

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Abstract

We experimentally investigate the impact of relevant parameters such as dispersion regime, and coupling ratio between the two loops on the phase noise performances of a 10 GHz coupled optoelectronic oscillator (COEO). The setup is based on a mode-locked semi-conductor laser at 1.55μm combined to a classical OEO. Optimization of these parameters leads to ultra-low phase noise at close-to-carrier frequencies (-100 dBc/Hz at 100 Hz and -125 dBc/Hz at 1 kHz).

146360
17675
20/11/2017

Contribution au développement d’architectures SoC radio fréquences massivement parallèles en technologies CMOS avancées

R.KASRI

MOST

Doctorat : Université de Toulouse III - Paul Sabatier, 20 Novembre 2017, 108p., Président: J.G.TARTARIN, Rapporteurs: N.DELTIMPLE, B.JARRY, Examinateurs: A.KAISER, Directeurs de thèse: E.TOURNIER, P.CATHELIN , N° 17675

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Résumé

L'accroissement du nombre de récepteurs que chaque personne utilise chaque jour, ainsi que l'avènement de l'agrégation des canaux dans les nouveaux standards de téléphonie mobile, appellent à la mise en place de nouvelles architectures de récepteurs massivement parallèles. Celles-ci doivent satisfaire plusieurs critères, comme notamment la robustesse aux interférences entre récepteur et une consommation de puissance maîtrisée au regard du débit reçu. Dans la littérature, deux grandes tendances se dégagent pour répondre à ce besoin. La première appelée '« Full Spectrum Capture '» est de numériser tout le spectre pour le traiter entièrement en numérique. La deuxième consiste à mettre en parallèle plusieurs récepteurs classiques recevant à des fréquences distinctes. Ces deux solutions présentent des limitations liées notamment à la consommation de puissance pour la première et aux interférences entre les récepteurs pour la seconde. Cette thèse propose une solution originale qui consiste en la mise en place d'une architecture '« N-path '» centrée autour d'un circuit '« Mixer-DAC '» constitué d'un ensemble de transconductances avec des pondérations en puissance de 2, que l'on peut éteindre et allumer à volonté. Cet ensemble d'interrupteurs est piloté par une mémoire contenant les échantillons sur n bits d'un signal sinusoïdal unique que l'on distribue différemment sur les différentes voies de réception afin de se caler autour de chacune de leur fréquence porteuse (Synthèse de Fréquence Digitale Directe DDFS). Cette technique basée sur une horloge unique permet de s'affranchir des interférences qui seraient causées par la mise en parallèle d'oscillateurs multiples. Le courant en sortie des transconductances est sommé vers un même circuit N-path qui sert de filtre de réception, avec de bonnes performances en termes de consommation de puissance, de faible surface d'intégration et de faibles valeurs de tension d'alimentation imposées par la technologie utilisée : 28nm FDSOI de STMicroelectronics. Un démonstrateur a été implémenté sur cette technologie afin de démontrer la faisabilité de cette technique de réception multiple sur deux récepteurs en parallèle. Chaque récepteur consomme 9.5 mW avec un gain entre 20 et 30 dB, un facteur de bruit entre 7 et 13 dB, 42 dB de réjection d'image, et plus de 43 dB de réjection d'harmonique. Finalement, l'isolation entre les horloges des deux récepteurs a été mesurée et est supérieure à 75 dB, ce qui montre une bonne isolation et confirme la pertinence de notre architecture pour le développement futur de récepteurs massivement parallèles.

Abstract

During the last decade, a trend in receiver design has been to integrate more and more tuners on the same chip. When implemented using analog tuners, each tuner requires its own PLL and inductor VCO, increasing chip area and power, while introducing interference issues between uncorrelated frequencies. Digitizing the whole spectrum, also known as Full Spectrum Capture (FSC), moves the channel selection and processing to digital. It allows a high number of received channels on the same chip, while only one clock is required. However, FSC puts a heavy burden on the ADC and digital processing, leading to a high and fixed power consumption as the FSC system samples the entire band, even when only a few channels are needed. To reduce the FSC-power burden, this thesis proposes a power efficient and power scalable architecture. It exploits a mixer-DAC driven by Direct Digital Frequency Synthesis (DDFS) for each channel, using all a single clock. We target 40dB dynamic range (8-bit DDFS-mixer-DAC), which is sufficient for many upcoming applications. We exploit 28nm UTBB FD-SOI CMOS technology, as it has low power digital signal processing capabilities and good MOSFET characteristics even at short channel lengths. Our circuit is based on a mixer-DAC that exploits 8 binary scaled transconductances driven by the same RF-voltage, while summing their currents at the output. The output current is thus the product of the analog input voltage and the digital code (DDFS output) that varies over time as a sampled walking sinewave. This realizes a multiplying-DAC or mixer-DAC. Using a sinewave-like mixing signal enhances conversion gain by π/2, and improves NF. The binary weighting is implemented putting identical switched-Gm mixer slices in parallel. If enabled, it operates as a linear and low noise CMOS inverter, which has favorable properties like high linearity, class-AB behavior and current re-use. A differential load made of two capacitors is implemented. The two switched capacitors act like an N-path band pass filter and improve the robustness of the receiver for interfering channels non-linearities. A demonstrator with two parallel tuners receiving two uncorrelated frequencies were implemented. Each tuner consumes 9.5mW with a gain of 20 to 30dB, an NF from 7 to 13dB, an image rejection of 42 dB and more than 43 dB of harmonic rejection. Finally, cross-talk rejection between the two tuners'clocks was measured and is superior to 75 dB, which is a high enough value to confirm the adequacy of our architecture for a future development with a lot of tuners in parallel.

145773
17336
26/10/2017

Phase noise study based on transfer function in coupled optoelectronic oscillators

R.KHAYATZADEH, V.AUROUX, G.BAILLY, A.FERNANDEZ , O.LLOPIS

MOST, I2C

Manifestation avec acte : International Topical Meeting on Microwave Photonics ( MWP ) 2017 du 23 octobre au 26 octobre 2017, Beijing (Chine), Octobre 2017, 4p. , N° 17336

Lien : https://hal.laas.fr/hal-01587950

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Abstract

In this paper, the transfer function theory is used to model the phase noise power spectral density in coupled optoelectronic oscillators. A resonator is placed into the model in order to take into account the quality factor (Q) enhancement due to the optical loop. The results of this model are then compared with experimental measurement results. The model is able to describe the phase noise spectrum shape and to give indications on the noise contributors, which helps in improving oscillator's performance.

141077
17505
23/10/2017

Experimental design of a low phase noise coupled optoelectronic oscillator at 10GHz

O.LELIEVRE, V.CROZATIER, G.BAILI, P.NOUCHI, D.DOLFI, L.MORVAN, F.GOLDFARB, F.BRETENAKER, O.LLOPIS

Thales R&T, LAC, MOST

Manifestation avec acte : International Topical Meeting on Microwave Photonics ( MWP ) 2017 du 23 octobre au 26 octobre 2017, Beijing (Chine), Octobre 2017, 4p. , N° 17505

Lien : https://hal.laas.fr/hal-01990778

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Abstract

We present an experimental study on two key elements to design a low phase noise coupled optoelectronic oscillator (COEO). Fiber lengths and dispersions are investigated to highlight the differences between the optical and optoelectronic loops. After optimization, a 10 GHz COEO at 1.5 μm with a total of 590 m of fiber exhibits phase noise levels of -125 dBc/Hz at 1 kHz and -140 dBc/Hz at 10 kHz.

142277
17504
01/10/2017

A Model for Designing Ultralow Noise Single- and Dual-Loop 10-GHz Optoelectronic Oscillators

O.LELIEVRE, V.CROZATIER, P.BERGER, G.BAILI, O.LLOPIS, D.DOLFI, P.NOUCHI, F.GOLDFARB, F.BRETENAKER, L.MORVAN, G.PILLET

Thales R&T, MOST, LAC

Revue Scientifique : Journal of Lightwave Technology, Vol.35, N°20, pp.4366-4374, Octobre 2017 , N° 17504

Lien : https://hal.laas.fr/hal-01990111

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Abstract

A complete model describing both single- and dual-loop optoelectronic oscillators (OEO) is introduced. It is compared to several experimental configurations, with excellent agreement in all cases. The physical insight into noise coupling mechanisms brought by the model further allows us for the design of ultralow noise OEO. Phase noise performances at 10 GHz with a single 1 km delay line and with a dual 1 km/100 m delay lines are reported. An optimized dual loop configuration exhibits low phase noise floor at high offset frequency (-160 dBc/Hz at 100 kHz) and low spur levels (-145 dBc/Hz), here again in close agreement with our model.

142275
17721
28/09/2017

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

J.G.TARTARIN, O.LAZAR, D.SAUGNON, B.LAMBERT, C.MOREAU, C.BOUEXIERE, E.ROMAIN-LATU, K.ROUSSEAU, A.DAVID, J.L.ROUX

MOST, UMS, DGA, Rennes, SERMA Technologies, CNES

Manifestation avec acte : European Symposium on the Reliability of Electron Devices, Failure Physics and Analysis ( ESREF ) 2017 du 25 septembre au 28 septembre 2017, Bordeaux (France), Septembre 2017 , N° 17721

Lien : https://hal.laas.fr/hal-02088188

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Abstract

This paper proposes an investigation focused on the Schottky Diode related electrical behaviors on GaN high frequency technologies. As the Schottky Diode represents the electrical input terminal (the command) of High Electron Mobility Transistors (HEMTs), this study also correlates with some first order degradation in the active channel (current IDS). Non-invasive methods and related models have been used to determine the accurate Schottky Barrier Height (SBH) of the diode in terms of mean value and dispersion; this approach is convenient to evidence different failure mechanisms on virgin and stressed devices that can be correlated with DC or transient electrical parameters. It is shown that according to given temperature windows and IGS ranges, linear relationships can be extracted between the mean SBH and the inhomogeneities of the SBH that appear in forward-biased diode mode. This original approach permits to determine an increase or a decrease of the global SBH after a stress period. Electrical behaviors issued from the proposed non-destructive technique and from electrical modelling of the diode at different temperatures are found to be consistent with Transmission Electron Microscope (TEM) investigations. T-CAD models have also been used and tuned to account for the impact of interface fixed charge density changes on the electrical signatures of the HEMTs.

147256
17721
01/09/2017

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

J.G.TARTARIN, O.LAZAR, D.SAUGNON, B.LAMBERT, C.MOREAU, C.BOUEXIERE, E.ROMAIN-LATU, K.ROUSSEAU, A.DAVID, J.L.ROUX

MOST, UMS, DGA, Rennes, SERMA Technologies, CNES

Revue Scientifique : Microelectronics Reliability, Vol.76-77, pp.344-349, Septembre 2017 , N° 17721

Lien : https://hal.laas.fr/hal-02088137

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Abstract

This paper proposes an investigation focused on the Schottky Diode related electrical behaviors on GaN high frequency technologies. As the Schottky Diode represents the electrical input terminal (the command) of High Electron Mobility Transistors (HEMTs), this study also correlates with some first order degradation in the active channel (current IDS). Non-invasive methods and related models have been used to determine the accurate Schottky Barrier Height (SBH) of the diode in terms of mean value and dispersion; this approach is convenient to evidence different failure mechanisms on virgin and stressed devices that can be correlated with DC or transient electrical parameters. It is shown that according to given temperature windows and IGS ranges, linear relationships can be extracted between the mean SBH and the inhomogeneities of the SBH that appear in forward-biased diode mode. This original approach permits to determine an increase or a decrease of the global SBH after a stress period. Electrical behaviors issued from the proposed non-destructive technique and from electrical modelling of the diode at different temperatures are found to be consistent with Transmission Electron Microscope (TEM) investigations. T-CAD models have also been used and tuned to account for the impact of interface fixed charge density changes on the electrical signatures of the HEMTs.

147255
17507
13/07/2017

In-situ dispersion measurement of a coupled optoelectronic oscillator

O.LELIEVRE, V.CROZATIER, G.BAILI, P.NOUCHI, D.DOLFI, L.MORVAN, F.GOLDFARB, F.BRETENAKER, O.LLOPIS

Thales R&T, LAC, MOST

Manifestation avec acte : Joint conference of the IEEE International Frequency Control Symposium and European Frequency and Time Forum ( IFCS-EFTF ) 2017 du 10 juillet au 13 juillet 2017, Besançon (France), Juillet 2017, 2p. , N° 17507

Lien : https://hal.laas.fr/hal-01990772

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142281
17244
13/07/2017

Active devices choice and design of an all cryogenic superconductor resonator oscillator

D.CHAUDY, O.LLOPIS, B.MARCILHAC, O.D'ALLIVY KELLY, J.M.HODE

MOST, UMP Thalès, Thales Airborne Systems

Manifestation avec acte : Joint conference of the IEEE International Frequency Control Symposium and European Frequency and Time Forum ( IFCS-EFTF ) 2017 du 10 juillet au 13 juillet 2017, Besançon (France), Juillet 2017, 4p. , N° 17244

Lien : https://hal.archives-ouvertes.fr/hal-01568097

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Abstract

Several silicon-germanium bipolar transistors have been measured at cryogenic temperature regarding their gain and phase noise performance. The electrical model of the chosen device has been extracted. Using this model, the phase noise performance of a cryogenic superconductor oscillator has been simulated. The results are very promising, with a phase noise level of-155 dBc/Hz at 1 kHz offset from of a 1 GHz carrier.

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