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17481
19/01/2018

ESD Protection Methodologies: From Component to System

M.BAFLEUR, F.CAIGNET, N.NOLHIER

ESE

Ouvrage (auteur) : ESD Protection Methodologies: From Component to System, Elsevier, N°ISBN 9781785481222, Janvier 2018, 284p. , N° 17481

Lien : https://hal.laas.fr/hal-01613901

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Abstract

Failures caused by electrostatic discharges (ESD) constitute a major problem concerning the reliability and robustness of integrated circuits and electronic systems. This book summarizes the many diverse methodologies aimed at ESD protection and shows, through a number of concrete studies, that the best approach in terms of robustness and cost-effectiveness consists of implementing a global strategy of ESD protection. ESD Protection Methodologies begins by exploring the various normalized test techniques that are used to qualify ESD robustness as well as characterization and defect localization methods aimed at implementing corrective measures. Due to the increasing complexity of integrated circuits, it is important to be able to provide a simulation in which the implemented ESD protection strategy provides the desired protection, while not harming the performance levels of the circuit. Therefore, the main features and difficulties related to the different types of simulation, finite element, SPICE-type and behavioral, are then studied. To conclude, several case studies are presented which provide real-life examples of the approaches explained in the previous chapters and validate a number of the strategies from component to system level.

142061
17449
11/12/2017

A new methodology to build the Internal Activity Block of ICEM-CE for complex Integrated Circuits

C.GHFIRI, A.BOYER, A.DURIER, S.BEN DHIA

ESE, IRT

Revue Scientifique : IEEE Transactions on Electromagnetic Compatibility, 11p., Décembre 2017, Doi 10.1109/TEMC.2017.2767084 , N° 17449

Lien : https://hal.archives-ouvertes.fr/hal-01659770

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Abstract

End-users of integrated circuits need models to anticipate and solve conducted emission issues at board level in a short time. The standard IEC62433-2 ICEM-CE has been proposed to respond to this demand. Although the standard proposes methods to extract circuit models from measurements, they cannot provide activity dependent models and may lead to inaccurate results for large and complex circuits. This paper describes a new methodology of construction of the internal activity block of an ICEM-CE model adapted to large digital integrated circuits and validated on a FPGA. The method is based on a predictive approach using the estimation tools of the dynamic power and the data path delays proposed by the manufacturer of the integrated circuit.

141724
17494
01/12/2017

Single piezoelectric transducer as strain sensor and energy harvester using time-multiplexing operation

Z.CHEW, T.RUAN, M.ZHU, M.BAFLEUR, J.M.DILHAC

Exeter, ESE

Revue Scientifique : IEEE Transactions on Industrial Electronics, Vol.64, N°12, pp.9646-9656, Décembre 2017 , N° 17494

Lien : https://hal.archives-ouvertes.fr/hal-01677652

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Abstract

This paper presents the implementation of a single piece of macro-fiber composite (MFC) piezoelectric transducer as a multifunctional device for both strain sensing and energy harvesting for the first time in the context of an energy harvesting powered wireless sensing system. The multifunction device is achieved via time-multiplexing operation for alternating dynamic strain sensing and energy harvesting functions at different time slots associated with different energy levels, that is, when there is insufficient energy harvested in the energy storage for powering the system, the MFC is used as an energy harvester for charging up the storage capacitor; otherwise, the harvested energy is used for powering the system and the MFC is used as a strain sensor for measuring dynamic structural strain. A circuit is designed and implemented to manage the single piece of MFC as the multifunctional device in a time-multiplexing manner, and the operation is validated by the experimental results. The dynamic strains measured by the MFC in the implemented system match a commercial strain sensor of extensometer by 95.5 to 99.99 %, and thus the studied method can be used for autonomous structural health monitoring of dynamic strain.

142179
17354
08/09/2017

Comparison of extraction methods to build a radiated emission model of ICs (ICEM-RE): pros and cons

S.SERPAUD, C.GHFIRI, A.BOYER, A.DURIER

IRT, ESE

Manifestation avec acte : International Symposium on Electromagnetic Compatibility ( EMC Europe ) 2017 du 04 septembre au 08 septembre 2017, Angers (France), Septembre 2017, 23p. , N° 17354

Lien : https://hal.archives-ouvertes.fr/hal-01598948

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141159
17356
08/09/2017

Learning EMC of ICs with IC-EMC

A.BOYER, E.SICARD

ESE, INSAT

Manifestation avec acte : International Symposium on Electromagnetic Compatibility ( EMC Europe ) 2017 du 04 septembre au 08 septembre 2017, Angers (France), Septembre 2017, 20p. , N° 17356

Lien : https://hal.archives-ouvertes.fr/hal-01598932

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141173
17355
08/09/2017

ICEM Generator – A tool for the construction of IC emission models

A.BOYER, C.GHFIRI, A.DURIER

ESE, IRT

Manifestation avec acte : International Symposium on Electromagnetic Compatibility ( EMC Europe ) 2017 du 04 septembre au 08 septembre 2017, Angers (France), Septembre 2017, 14p. , N° 17355

Lien : https://hal.archives-ouvertes.fr/hal-01598931

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141161
17453
08/09/2017

A new methodology to extract the ICEM-CE internal activity block of a FPGA

C.GHFIRI, A.DURIER, A.BOYER, S.BEN DHIA

IRT, ESE

Manifestation avec acte : International Symposium on Electromagnetic Compatibility ( EMC Europe ) 2017 du 04 septembre au 08 septembre 2017, Angers (France), Septembre 2017, 7p. , N° 17453

Lien : https://hal.archives-ouvertes.fr/hal-01661809

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Abstract

This paper describes a new methodology of construction of the internal activity block of an ICEM-CE model of an FPGA based on a predictive approach using the estimation tools of the dynamic power and the static timing proposed by the manufacturer of the integrated circuit.

141793
17421
01/09/2017

New triggering-speed-characterization method for diode-triggered SCR using TLP

M.MAHANE, D.TREMOUILLES, M.BAFLEUR, B.THON, M.DIATTA, L.JAOUEN

ISGE, ESE, ST

Revue Scientifique : Microelectronics Reliability, Vol.76-77, pp.692-697, Septembre 2017 , N° 17421

Lien : https://hal.laas.fr/hal-01643028

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Abstract

The key parameters in the optimization of the Diode Triggered Silicon-Controlled Rectifier (DTSCR) as a RF ESD protection, are the turn-on time and the trigger-voltage overshoots seen before the SCR turns on, during very fast ESD transients [1]. But at this time, there is no normalized method to evaluate and report the ESD device turn-on speed [2]. Such a method would be required to effectively compare device performance. In this work a new method , based on stored-charge, is investigated to characterize the triggering speed of DTSCR using Transmission Line Pulsing (TLP) measurements

141644
17472
01/09/2017

Proceedings of the 28th European Symposium on the reliability of electron devices, failure physics and analysis

N.LABAT, F.MARC, H.FREMONT, M.BAFLEUR

IMS Bordeaux, ESE

Revue Scientifique : Microelectronics Reliability, Vol.76-77, pp.1-5, Septembre 2017 , N° 17472

Lien : https://hal.archives-ouvertes.fr/hal-01660958

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Abstract

This special issue of Microelectronics Reliability is devoted to the publication of the papers presented during the 28th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, ESREF 2017. The conference will be held in Bordeaux (France) from September 25th to September 28th, 2017.

141933
17278
08/07/2017

Study of the thermal aging effect on the conducted emission of a synchronous buck converter

A.BOYER, M.GONZALEZ SENTIS, C.GHFIRI, A.DURIER

ESE, IRT

Manifestation avec acte : International Workshop on Electromagnetic Compatibility of Integrated Circuits ( EMC Compo ) 2017 du 04 juillet au 08 juillet 2017, St Petersbourg (Russie), Juillet 2017, pp.79-84 , N° 17278

Lien : https://hal.archives-ouvertes.fr/hal-01574379

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Abstract

This paper studies the impact of the accelerated thermal aging on the conducted emission produced by a synchronous buck converter. The most degraded devices mounted on the DC-DC converter are identified and modeled in order to simulate the evolution of conducted emission and anticipate risks of non-compliance to emission requirements.

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